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  • 48MHz Cortex-M0+ 32-bit CPU

  • Supports single-cycle multiply instructions,MPU

  • 64KBFlash, 8KB SRAM

  • 512Byte OTP

  • Flexible power management mode

    – Auto switching of VBAT backup power

    – 1μA VBAT mode + RTC + backup register

    – 0.7μA Stop mode, CPU + SRAM hold mode

    – 1.15μA Stop mode + RTC

    – 4.1 μs wake up@Stop mode from flash executor

  • Power monitoring: supports BOR and PVD

  • Clock source

    – External high-speed clock: 1~32MHz, supports oscillation stop detection

    – External low-speed clock: 32.768KHz, supports oscillation stop detection

    – Internal high-speed clock: 32MHz, full temperature change ≤ ±2%

    – Internal low-power low-speed clock: 32KHz

    – PLL: 5MHz ~ 48MHz

  • Up to 56 IOs, anti-backflow and compatible with 5V communications; up to 20mA for IO with high drive capability

  • 2-channel DMA controller with flexible mapping

  • 8x timers

    – 1x 16-bit 4-channel general timers

    – 1x 16-bit basic timer

    – 1x 16-bit low-power timers, one of which supports orthogonal encoding

    – 1x 24-bit SysTick

    – 2x watchdogs: IWDG and WWDG

  • RTC calibration accuracy ± 0.477 ppm, support alarm clock, timestamp, micro-second unit wake-up timer

  • Communication interface

    – 1x LPUART interfaces, supports wakeup from FIFO and Stop mode

    – 2x U(S)ART interfaces, one of which supports SPI master mode

    – 1x SPI interfaces, with maximum speed of 20Mbps in master mode

    – 2x I2C, supports master and slave modes, 1Mbps Fm+

  • Information security 

    – SM4,TRNG, CRC

    – TAMP anti-tamper and backup registers

    –PCROP code protection area

  • LCD supports up to 8COM x 32SEG

  • On-chip resistance voltage, high and low drive can be dynamic switching, low power consumption to enhance the display effect, no external capacitance

  • Built-in charge pump, VLCD voltage can be higher than VDD and does not change with VDD, even if VDD jitter still maintain good display

  • 12-bit 1.14Msps high-precision SAR ADC, capable of measuring signals with high output impedance

  • 2x ultra-low power comparators,rail-to-rail input supported

  • Built-in reference voltage source VREFBUF,2.048V, 2.5V, supports output through IO

  • 1x temperature sensor, with maximum error of ±2°C

  • 96-bit unique ID

  • Built-in Bootloader: supports UART and SPI

  • SWD debugging

  • Operating conditions: 1.8V~5.5V, -40°C~85°C

  • Package: LQFP64/48, QFN32

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